Alt-BEAM Archive
Message #05303
To: BEAM beam@sgiblab.sgi.com
From: Sean Rigter rigter@cafe.net
Date: Sat, 17 Jul 1999 11:45:17 -0700
Subject: [alt-beam] MPNC was AUTOMATIC PNC
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Hello group,
Nudged by Bruce Robinson,
>But, umm, tell me. How would your circuit look for a 6-Nv microcore?
.
here is an short article describing an improved PNC circuit with
examples for 4 and 6 Nv cores. Also included is an introduction to MPIC
pulse injection controlled gait changes. The latter is an untested
experimental design and there is much detail to be worked out. Feel
free to build it and report back to BEAM land.
enjoy
wilf
MPNC Nvcores - a logical solution for saturation problems
using the multiple pulse neutralizing circuit
wilf rigter - 07/99
In a conventional microcore design the dreaded twin process saturation
problem is addressed with a Nu based pulse neutralizing circuit (PNC)
which absorbs all circulating processes and when it times out initiates
a single process in the microcore. Since the PNC forces one Nv output
active low any motor connected to that Nv would be rotating possibly
mangling a pair of legs in the process. This is normally avoided by
disabling the output drivers during the time the PNC is active.
Despite the PNC's longevity in BEAM land, all things must change as old
PNC based ucore designs are superseded by a new generation of Nv core
designs which include a "multiple process neutralizing circuit" (MPNC).
Unlike the PNC base ucore circuits, this new design instantly
initializes the Nvcore and does not require any motor driver inhibit.
After power up, the MPNC constantly monitors for and neutralizes
multiple processes in the core. Since the MPNC does not require an Nu
inverter, a single 74HC14 can be used for a 6Nv core.
The MPNC design is added to a Nvcore with simple diode logic requiring
only 2 diodes for a 4Nv ucore and 4 diodes for a 6Nv hexcore.
THE 4NvMPNC
A 4Nv microcore uses 2 diodes to snuff out core saturation by
neutralizing multiple (twin) processes with the anodes of the diodes
connected to N1 and Nv2 outputs and the cathodes to Nv3 and Nv4 bias
points respectively. 4NvMPNC.GIF shows the schematic for a MPNC ucore
complete with a 74AC240 reverser circuit. The MPNC logic is simple: with
two possible saturation states (NV1 AND Nv3 active or Nv2 AND Nv4
active), the 1Nv output is active low and this level connected through
the diode to the Nv3 bias point forces the Nv3 output high, neutralizing
the saturation process. Similarly the Nv2 output neutralizes any
potential saturation process in Nv4.
THE 6NvMPNC
A 6Nv MPNC hexcore requires 4 diodes compared to the 2 diode MPNC ucore
to neutralize not only twin but also triplett multiple processes. To
instantly start the 6Nv core with a simgle process in Nv1 the diodes are
connected as follows: The anodes of 3 diodes are connected to Nv1 output
with cathodes connected to the bias points of Nv3, Nv4 and Nv5. The
fourth diode anode is connected to Nv2 output and cathode to Nv6 bias
point. The graphic 6NvMPNC.GIF is attached showing the schematic of a
6Nv hexcore with MPNC.
THE 6NvMPIC
As an introduction to the more advanced concept of the Multiple Process
Injection Circuit (MPIC) for gait control, I have included 6NVMPIC, a
draft schematic which shows how one can inject (and regenerate) an
arbitary number of processes in a 6 Nvcore. The MPIC includes the same
function as the MPNC since it must be able to inject as well as
neutralize in order to control processes. It is possible to add the MPIC
to a conventional PNC design to initiate the gait at power up. The MPIC
control lines can be connected to a number of sources including DIP
switch, "Collission Nu", "Turning Nu" etc but also (via a simple
infrared or radio link) to an IBM PC printer port or onboard STAMP or
PIC I/O line. The example shows a single process default HexCore with 20
second duration Nu controlled process injection circuits.
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5304 Sunday, 18 July 1999 4:44 MPNC was AUTOMATIC PNC BEAM Sean Rigter
>Hello group,
>
>Nudged by Bruce Robinson,
>
>>But, umm, tell me. How would your circuit look for a 6-Nv microcore?
>.
>
>here is an short article describing an improved PNC circuit with
>examples for 4 and 6 Nv cores. Also included is an introduction to MPIC
>pulse injection controlled gait changes. The latter is an untested
>experimental design and there is much detail to be worked out. Feel
>free to build it and report back to BEAM land.
>
>enjoy
>
>wilf
>
>
>
> MPNC Nvcores - a logical solution for saturation problems
> using the multiple pulse neutralizing circuit
> wilf rigter - 07/99
>
>In a conventional microcore design the dreaded twin process saturation
>problem is addressed with a Nu based pulse neutralizing circuit (PNC)
>which absorbs all circulating processes and when it times out initiates
>a single process in the microcore. Since the PNC forces one Nv output
>active low any motor connected to that Nv would be rotating possibly
>mangling a pair of legs in the process. This is normally avoided by
>disabling the output drivers during the time the PNC is active.
>
>Despite the PNC's longevity in BEAM land, all things must change as old
>PNC based ucore designs are superseded by a new generation of Nv core
>designs which include a "multiple process neutralizing circuit" (MPNC).
>Unlike the PNC base ucore circuits, this new design instantly
>initializes the Nvcore and does not require any motor driver inhibit.
>After power up, the MPNC constantly monitors for and neutralizes
>multiple processes in the core. Since the MPNC does not require an Nu
>inverter, a single 74HC14 can be used for a 6Nv core.
>
>The MPNC design is added to a Nvcore with simple diode logic requiring
>only 2 diodes for a 4Nv ucore and 4 diodes for a 6Nv hexcore.
>
>THE 4NvMPNC
>
>A 4Nv microcore uses 2 diodes to snuff out core saturation by
>neutralizing multiple (twin) processes with the anodes of the diodes
>connected to N1 and Nv2 outputs and the cathodes to Nv3 and Nv4 bias
>points respectively. 4NvMPNC.GIF shows the schematic for a MPNC ucore
>complete with a 74AC240 reverser circuit. The MPNC logic is simple: with
>two possible saturation states (NV1 AND Nv3 active or Nv2 AND Nv4
>active), the 1Nv output is active low and this level connected through
>the diode to the Nv3 bias point forces the Nv3 output high, neutralizing
>the saturation process. Similarly the Nv2 output neutralizes any
>potential saturation process in Nv4.
>
>THE 6NvMPNC
>
>A 6Nv MPNC hexcore requires 4 diodes compared to the 2 diode MPNC ucore
>to neutralize not only twin but also triplett multiple processes. To
>instantly start the 6Nv core with a simgle process in Nv1 the diodes are
>connected as follows: The anodes of 3 diodes are connected to Nv1 output
>with cathodes connected to the bias points of Nv3, Nv4 and Nv5. The
>fourth diode anode is connected to Nv2 output and cathode to Nv6 bias
>point. The graphic 6NvMPNC.GIF is attached showing the schematic of a
>6Nv hexcore with MPNC.
>
>THE 6NvMPIC
>
>As an introduction to the more advanced concept of the Multiple Process
>Injection Circuit (MPIC) for gait control, I have included 6NVMPIC, a
>draft schematic which shows how one can inject (and regenerate) an
>arbitary number of processes in a 6 Nvcore. The MPIC includes the same
>function as the MPNC since it must be able to inject as well as
>neutralize in order to control processes. It is possible to add the MPIC
>to a conventional PNC design to initiate the gait at power up. The MPIC
>control lines can be connected to a number of sources including DIP
>switch, "Collission Nu", "Turning Nu" etc but also (via a simple
>infrared or radio link) to an IBM PC printer port or onboard STAMP or
>PIC I/O line. The example shows a single process default HexCore with 20
>second duration Nu controlled process injection circuits.
>
>
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